From: kaf24@scramble.cl.cam.ac.uk Date: Tue, 7 Oct 2003 12:32:59 +0000 (+0000) Subject: bitkeeper revision 1.479.1.2 (3f82b27bs1X_MKIKX_N2i0rMH-SKXQ) X-Git-Tag: archive/raspbian/4.8.0-1+rpi1~1^2~18641^2 X-Git-Url: https://dgit.raspbian.org/%22http:/www.example.com/cgi/%22https://%22%22/%22http:/www.example.com/cgi/%22https:/%22%22?a=commitdiff_plain;h=dc1199d9e7887332302d18e95233170e8a5ce5f5;p=xen.git bitkeeper revision 1.479.1.2 (3f82b27bs1X_MKIKX_N2i0rMH-SKXQ) Many files: Add linear mapping of PTEs to every page table. --- diff --git a/xen/arch/i386/mm.c b/xen/arch/i386/mm.c index 2af01e8760..34ab91add3 100644 --- a/xen/arch/i386/mm.c +++ b/xen/arch/i386/mm.c @@ -69,7 +69,7 @@ static void __init fixrange_init (unsigned long start, if ( !l2_pgentry_empty(*l2e) ) continue; page = (unsigned long)get_free_page(GFP_KERNEL); clear_page(page); - *l2e = mk_l2_pgentry(__pa(page) | PAGE_HYPERVISOR); + *l2e = mk_l2_pgentry(__pa(page) | __PAGE_HYPERVISOR); vaddr += 1 << L2_PAGETABLE_SHIFT; } } @@ -95,7 +95,7 @@ void __init paging_init(void) ioremap_pt = (void *)get_free_page(GFP_KERNEL); clear_page(ioremap_pt); idle0_pg_table[IOREMAP_VIRT_START >> L2_PAGETABLE_SHIFT] = - mk_l2_pgentry(__pa(ioremap_pt) | PAGE_HYPERVISOR); + mk_l2_pgentry(__pa(ioremap_pt) | __PAGE_HYPERVISOR); /* Create read-only mapping of MPT for guest-OS use. */ idle0_pg_table[READONLY_MPT_VIRT_START >> L2_PAGETABLE_SHIFT] = diff --git a/xen/arch/i386/setup.c b/xen/arch/i386/setup.c index 58b8496323..61ea25c6e0 100644 --- a/xen/arch/i386/setup.c +++ b/xen/arch/i386/setup.c @@ -272,7 +272,11 @@ void __init cpu_init(void) pl2e = idle_pg_table[nr] + (MAPCACHE_VIRT_START >> L2_PAGETABLE_SHIFT); mapcache[nr] = (unsigned long *)get_free_page(GFP_KERNEL); clear_page(mapcache[nr]); - *pl2e = mk_l2_pgentry(__pa(mapcache[nr]) | PAGE_HYPERVISOR); + *pl2e = mk_l2_pgentry(__pa(mapcache[nr]) | __PAGE_HYPERVISOR); + + /* Set up linear page table mapping. */ + idle_pg_table[nr][LINEAR_PT_VIRT_START >> L2_PAGETABLE_SHIFT] = + mk_l2_pgentry(__pa(idle_pg_table[nr]) | __PAGE_HYPERVISOR); init_idle_task(); } diff --git a/xen/common/domain.c b/xen/common/domain.c index 105c1880a9..481234bda6 100644 --- a/xen/common/domain.c +++ b/xen/common/domain.c @@ -367,6 +367,8 @@ int final_setup_guestos(struct task_struct * p, dom_meminfo_t * meminfo) * sizeof(l2_pgentry_t)); l2tab[PERDOMAIN_VIRT_START >> L2_PAGETABLE_SHIFT] = mk_l2_pgentry(__pa(p->mm.perdomain_pt) | __PAGE_HYPERVISOR); + l2tab[LINEAR_PT_VIRT_START >> L2_PAGETABLE_SHIFT] = + mk_l2_pgentry(phys_l2tab | __PAGE_HYPERVISOR); p->mm.pagetable = mk_pagetable(phys_l2tab); unmap_domain_mem(l2tab); @@ -542,6 +544,8 @@ int setup_guestos(struct task_struct *p, dom0_newdomain_t *params, memcpy(l2tab, idle_pg_table[p->processor], PAGE_SIZE); l2tab[PERDOMAIN_VIRT_START >> L2_PAGETABLE_SHIFT] = mk_l2_pgentry(__pa(p->mm.perdomain_pt) | __PAGE_HYPERVISOR); + l2tab[LINEAR_PT_VIRT_START >> L2_PAGETABLE_SHIFT] = + mk_l2_pgentry(phys_l2tab | __PAGE_HYPERVISOR); memset(l2tab, 0, DOMAIN_ENTRIES_PER_L2_PAGETABLE*sizeof(l2_pgentry_t)); p->mm.pagetable = mk_pagetable(phys_l2tab); diff --git a/xen/common/memory.c b/xen/common/memory.c index b3f1417f61..7164850bf2 100644 --- a/xen/common/memory.c +++ b/xen/common/memory.c @@ -367,6 +367,9 @@ static int get_l2_table(unsigned long page_nr) p_l2_entry[(PERDOMAIN_VIRT_START >> L2_PAGETABLE_SHIFT) - DOMAIN_ENTRIES_PER_L2_PAGETABLE] = mk_l2_pgentry(__pa(current->mm.perdomain_pt) | __PAGE_HYPERVISOR); + p_l2_entry[(LINEAR_PT_VIRT_START >> L2_PAGETABLE_SHIFT) - + DOMAIN_ENTRIES_PER_L2_PAGETABLE] = + mk_l2_pgentry((page_nr << PAGE_SHIFT) | __PAGE_HYPERVISOR); out: unmap_domain_mem(p_l2_entry); @@ -785,7 +788,7 @@ int do_process_page_updates(page_update_request_t *ureqs, int count) case PGREQ_NORMAL: page = frame_table + pfn; flags = page->flags; - + if ( DOMAIN_OKAY(flags) ) { switch ( (flags & PG_type_mask) ) diff --git a/xen/include/asm-i386/flushtlb.h b/xen/include/asm-i386/flushtlb.h index a021597ad6..3a063fc0cb 100644 --- a/xen/include/asm-i386/flushtlb.h +++ b/xen/include/asm-i386/flushtlb.h @@ -14,12 +14,6 @@ #include atomic_t tlb_flush_count[NR_CPUS]; -#define __read_cr3(__var) \ - do { \ - __asm__ __volatile ( \ - "movl %%cr3, %0;" \ - : "=r" (__var)); \ - } while (0) #define __write_cr3_counted(__pa) \ do { \ diff --git a/xen/include/asm-i386/processor.h b/xen/include/asm-i386/processor.h index f358325d1f..123edf6739 100644 --- a/xen/include/asm-i386/processor.h +++ b/xen/include/asm-i386/processor.h @@ -19,7 +19,8 @@ * Default implementation of macro that returns current * instruction pointer ("program counter"). */ -#define current_text_addr() ({ void *pc; __asm__("movl $1f,%0\n1:":"=g" (pc)); pc; }) +#define current_text_addr() \ + ({ void *pc; __asm__("movl $1f,%0\n1:":"=g" (pc)); pc; }) /* * CPU type and hardware bug flags. Kept separately for each CPU. @@ -159,6 +160,34 @@ static inline unsigned int cpuid_edx(unsigned int op) return edx; } + +/* + * Intel CPU flags in CR0 + */ +#define X86_CR0_PE 0x00000001 /* Enable Protected Mode (RW) */ +#define X86_CR0_MP 0x00000002 /* Monitor Coprocessor (RW) */ +#define X86_CR0_EM 0x00000004 /* Require FPU Emulation (RO) */ +#define X86_CR0_TS 0x00000008 /* Task Switched (RW) */ +#define X86_CR0_NE 0x00000020 /* Numeric Error Reporting (RW) */ +#define X86_CR0_WP 0x00010000 /* Supervisor Write Protect (RW) */ +#define X86_CR0_AM 0x00040000 /* Alignment Checking (RW) */ +#define X86_CR0_NW 0x20000000 /* Not Write-Through (RW) */ +#define X86_CR0_CD 0x40000000 /* Cache Disable (RW) */ +#define X86_CR0_PG 0x80000000 /* Paging (RW) */ + +#define read_cr0() ({ \ + unsigned int __dummy; \ + __asm__( \ + "movl %%cr0,%0\n\t" \ + :"=r" (__dummy)); \ + __dummy; \ +}) + +#define write_cr0(x) \ + __asm__("movl %0,%%cr0": :"r" (x)); + + + /* * Intel CPU features in CR4 */ diff --git a/xen/include/asm-i386/system.h b/xen/include/asm-i386/system.h index a19d629d8c..13ccbc5510 100644 --- a/xen/include/asm-i386/system.h +++ b/xen/include/asm-i386/system.h @@ -4,32 +4,9 @@ #include #include -struct task_struct; -extern void switch_to(struct task_struct *prev, - struct task_struct *next); - /* Clear and set 'TS' bit respectively */ #define clts() __asm__ __volatile__ ("clts") -#define read_cr0() ({ \ - unsigned int __dummy; \ - __asm__( \ - "movl %%cr0,%0\n\t" \ - :"=r" (__dummy)); \ - __dummy; \ -}) -#define write_cr0(x) \ - __asm__("movl %0,%%cr0": :"r" (x)); - -#define read_cr4() ({ \ - unsigned int __dummy; \ - __asm__( \ - "movl %%cr4,%0\n\t" \ - :"=r" (__dummy)); \ - __dummy; \ -}) -#define write_cr4(x) \ - __asm__("movl %0,%%cr4": :"r" (x)); -#define stts() write_cr0(8 | read_cr0()) +#define stts() write_cr0(X86_CR0_TS|read_cr0()) #define wbinvd() \ __asm__ __volatile__ ("wbinvd": : :"memory"); @@ -46,61 +23,10 @@ static inline unsigned long get_limit(unsigned long segment) #define xchg(ptr,v) ((__typeof__(*(ptr)))__xchg((unsigned long)(v),(ptr),sizeof(*(ptr)))) -#define tas(ptr) (xchg((ptr),1)) - struct __xchg_dummy { unsigned long a[100]; }; #define __xg(x) ((struct __xchg_dummy *)(x)) -/* - * The semantics of XCHGCMP8B are a bit strange, this is why - * there is a loop and the loading of %%eax and %%edx has to - * be inside. This inlines well in most cases, the cached - * cost is around ~38 cycles. (in the future we might want - * to do an SIMD/3DNOW!/MMX/FPU 64-bit store here, but that - * might have an implicit FPU-save as a cost, so it's not - * clear which path to go.) - */ -static inline void __set_64bit (unsigned long long * ptr, - unsigned int low, unsigned int high) -{ - __asm__ __volatile__ ( - "\n1:\t" - "movl (%0), %%eax\n\t" - "movl 4(%0), %%edx\n\t" - "cmpxchg8b (%0)\n\t" - "jnz 1b" - : /* no outputs */ - : "D"(ptr), - "b"(low), - "c"(high) - : "ax","dx","memory"); -} - -static inline void __set_64bit_constant (unsigned long long *ptr, - unsigned long long value) -{ - __set_64bit(ptr,(unsigned int)(value), (unsigned int)((value)>>32ULL)); -} -#define ll_low(x) *(((unsigned int*)&(x))+0) -#define ll_high(x) *(((unsigned int*)&(x))+1) - -static inline void __set_64bit_var (unsigned long long *ptr, - unsigned long long value) -{ - __set_64bit(ptr,ll_low(value), ll_high(value)); -} - -#define set_64bit(ptr,value) \ -(__builtin_constant_p(value) ? \ - __set_64bit_constant(ptr, value) : \ - __set_64bit_var(ptr, value) ) - -#define _set_64bit(ptr,value) \ -(__builtin_constant_p(value) ? \ - __set_64bit(ptr, (unsigned int)(value), (unsigned int)((value)>>32ULL) ) : \ - __set_64bit(ptr, ll_low(value), ll_high(value)) ) - /* * Note: no "lock" prefix even on SMP: xchg always implies lock anyway * Note 2: xchg has side effect, so that attribute volatile is necessary, diff --git a/xen/include/xeno/config.h b/xen/include/xeno/config.h index a4a62cafe2..a54b9146eb 100644 --- a/xen/include/xeno/config.h +++ b/xen/include/xeno/config.h @@ -63,12 +63,12 @@ #define READONLY_MPT_VIRT_START (HYPERVISOR_VIRT_START) #define READONLY_MPT_VIRT_END (READONLY_MPT_VIRT_START + (4*1024*1024)) /* - * Next 16MB is fixed monitor space, which is part of a 48MB direct-mapped + * Next 16MB is fixed monitor space, which is part of a 44MB direct-mapped * memory region. The following are machine addresses. */ #define MAX_MONITOR_ADDRESS (16*1024*1024) #define MAX_DMA_ADDRESS (16*1024*1024) -#define MAX_DIRECTMAP_ADDRESS (48*1024*1024) +#define MAX_DIRECTMAP_ADDRESS (44*1024*1024) /* And the virtual addresses for the direct-map region... */ #define DIRECTMAP_VIRT_START (READONLY_MPT_VIRT_END) #define DIRECTMAP_VIRT_END (DIRECTMAP_VIRT_START + MAX_DIRECTMAP_ADDRESS) @@ -78,8 +78,11 @@ #define RDWR_MPT_VIRT_END (RDWR_MPT_VIRT_START + (4*1024*1024)) #define FRAMETABLE_VIRT_START (RDWR_MPT_VIRT_END) #define FRAMETABLE_VIRT_END (DIRECTMAP_VIRT_END) +/* Next 4MB of virtual address space is used as a linear p.t. mapping. */ +#define LINEAR_PT_VIRT_START (DIRECTMAP_VIRT_END) +#define LINEAR_PT_VIRT_END (LINEAR_PT_VIRT_START + (4*1024*1024)) /* Next 4MB of virtual address space used for per-domain mappings (eg. GDT). */ -#define PERDOMAIN_VIRT_START (DIRECTMAP_VIRT_END) +#define PERDOMAIN_VIRT_START (LINEAR_PT_VIRT_END) #define PERDOMAIN_VIRT_END (PERDOMAIN_VIRT_START + (4*1024*1024)) #define GDT_VIRT_START (PERDOMAIN_VIRT_START) #define GDT_VIRT_END (GDT_VIRT_START + (64*1024)) diff --git a/xen/include/xeno/sched.h b/xen/include/xeno/sched.h index 3c191f13b3..b05c441727 100644 --- a/xen/include/xeno/sched.h +++ b/xen/include/xeno/sched.h @@ -281,6 +281,10 @@ void reschedule(struct task_struct *p); asmlinkage void __enter_scheduler(void); #define schedule() __schedule_not_callable_in_xen() +extern void switch_to(struct task_struct *prev, + struct task_struct *next); + + /* A compatibility hack for Linux drivers. */ #define MAX_SCHEDULE_TIMEOUT 0UL static inline long schedule_timeout(long timeout)